Chapter 15: Arithmetic Library
15–11
The following equation expresses the block function:
res = a 0 × b 0 ± a 1 × b 1 [+ a 2 × b 2 [± a 3 × b 3 ] ] [+ chainin ]
If there are four multipliers and the input bit widths are both less than or equal to 18,
you can optionally enable a chainout adder output ( chainout ) instead of the normal
output ( res ).
If there are four multipliers and the input bit widths are both equal to 18, you can
enable a chainout adder input ( chainin ). Only drive this chainin port from the
chainout output of a DSP block at the preceding stage.
Other features include:
Parameterizable input and output data widths
Optional asynchronous clear and clock enable inputs
Optional accumulator synchronous load input
Optional shiftin instead of an a input
Optional shift out from the a input of the last multiplier
Optional saturation overflow outputs
Optional registers to pipeline the adder and chainout adder
Optional accumulator mode
f For more information about multiplier or adder operations, refer to the altmult_add
Megafunction User Guide .
Table 15–19 shows the DSP block inputs and outputs.
Table 15–19. DSP Block Inputs and Outputs
a0—a3
b0—b3
ena
Signal
Direction
Input
Input
Input
Operand a.
Operand b.
Optional clock enable.
Description
chainin
Input
Optional input bus from the preceding stage.
(1)
zero_chainout
aclr
accum_sload
res
shiftouta
overflow
chainout
Input
Input
Input
Output
Output
Output
Output
Optional reset to zero for the chainout value.
Optional asynchronous clear.
Optional accumulator synchronous load input.
Result.
Optional shift out from A input of last multiplier.
Optional saturation overflow output.
Optional chainout output. (Replaces the res output when
enabled.)
Note to Table 15–19 :
(1) Use the chainin port to feed the adder result ( chainout ) from a previous stage. Do not use for any other signal.
November 2013
Altera Corporation
DSP Builder Handbook
Volume 2: DSP Builder Standard Blockset
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